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ADDENDUM No. 1 to JESD12 - TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS
Pages: 19
Publication date: 1993-08-01
CMOS SEMICUSTOM DESIGN GUIDELINES
Pages: 86
Publication date: 1991-11-01
ADDENDUM No. 6 to JESD12 - INTERFACE STANDARD FOR SEMICUSTOM INTEGRATED CIRCUITS
Pages: 13
Publication date: 1991-03-01
ADDENDUM No. 5 to JESD12 - DESIGN FOR TESTABILITY GUIDELINES
Pages: 85
Publication date: 1988-08-01
ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITS
Publication date: 1987-04-01
ADDENDUM No. 3 to JESD12 - CMOS GATE ARRAY MACROCELL STANDARD
Pages: 18
Publication date: 1986-06-01
ADDENDUM No. 2 to JESD12 - STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET
Pages: 38
Publication date: 1986-02-01
SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)
Pages: 14
Publication date: 1985-06-01